This invention relates to an integrated injection logic semiconductor device.
Recently, much attention has been paid to the integrated injection logic (I.sup.2 L) semiconductor device, simpler in construction, higher in manufacturing yeild and larger in integrated degree than a transistor-transistor logic semiconductor device. The I.sup.2 L device is called also "MTL" (merged transistor logic) semiconductor device. This I.sup.2 L semiconductor device is constructed such that a switching transistor and an injector for injecting minority carriers into the base region of the switching transistor are provided for the semiconductor substrate; and while the minority carriers are being injected into the base region of the switching transistor, the input of an I.sup.2 L device is controlled so as to effectively control the output thereof, i.e., the output appearing at the collector of a switching transistor.
In a conventional I.sup.2 L semiconductor device, an N type semiconductor layer is formed on the semiconductor by vapor epitaxial growth and on said N type semiconductor layer first and second P type regions formed by selectively diffusing boron into said N type semiconductor layer at a rate of about 10.sup.17 to 10.sup.19 atoms/cm.sup.3 are provided. Phosphorus is diffused into said first P type region at a rate of about 10.sup.19 to 10.sup.21 atoms/cm.sup.3 to form an N type region.
In the I.sup.2 L semiconductor device having the foregoing construction, a lateral PNP transistor is constituted by said second P type region (emitter), said N type semiconductor layer (base) and said first P type region (collector) while a vertical NPN transistor is constituted by said N conductivity type semiconductor layer (emitter), and first P type region (base) and said N type region (collector).
In the I.sup.2 L semiconductor device, since, as above described, said N type semiconductor layer region widened fanwise in a depth direction between said first and second P type regions is utilized as the base of the lateral transistor, the transport efficiency of the carriers supplied from the injector (the emitter of the lateral transistor) is not good. Further, since the base region of the lateral PNP transistor is commonly used also as the emitter region of the vertical NPN transistor, an improvement in the injection and transport efficiency of one transistor conversely causes a decrease in the injection and transistor efficiency of the other. As a result, the overall efficiency of the semiconductor device can not be increased to a greater extent than specified. Further, since said N type semiconductor layer constitutes the emitter of the vertical transistor, the impurity concentration of this N type semiconductor layer can not but be lower than that of said first P type region constituting the base layer of the vertical transistor. This is one of the causes of decreasing the injection and transport efficiency of the transistor.